Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes

Polar codes are a class of capacity-achieving error correcting codes that have been selected for use in enhanced mobile broadband in the 3GPP 5th generation (5G) wireless standard. Most polar code research examines the original Arikan polar coding scheme, which is limited in block length to powers of two. This constraint presents a considerable obstacle since practical applications call for all code lengths to be readily available. Puncturing and shortening techniques allow for flexible polar codes, while multi-kernel polar codes produce native code lengths that are powers of two and/or three. In this work, we propose a new low complexity coding scheme called asymmetric polar coding that allows for any arbitrary block length. We present details on the generator matrix, frozen set design, and decoding schedule. Our scheme offers flexible polar code lengths with decoding complexity lower than equivalent state-of-the-art length-compatible approaches under successive cancellation decoding. Further, asymmetric decoding complexity is directly dependent on the codeword length rather than the nearest valid polar code length. We compare our scheme with other length matching techniques, and simulations are presented. Results show that asymmetric polar codes present similar error correction performance to the competing schemes, while dividing the number of SC decoding operations by up to a factor of 2 using the same codeword lengthComment: To appear in IEEE International Conference on Communications 2019 (Submitted October 12, 2018), 6 page

Beyond Gbps Turbo Decoder on Multi-Core CPUs

International audienceThis paper presents a high-throughput implementation of a portable software turbo decoder. The code is optimized for traditional multi-core CPUs (like x86) and it is based on the Enhanced max-log-MAP turbo decoding variant. The code follows the LTE-Advanced specification. The key of the high performance comes from an inter-frame SIMD strategy combined with a fixed-point representation. Our results show that proposed multi-core CPU implementation of turbo-decoders is a challenging alternative to GPU implementation in terms of throughput and energy efficiency. On a high-end processor, our software turbo-decoder exceeds 1 Gbps information throughput for all rate-1/3 LTE codes with K < 4096

Fast Simulation and Prototyping with AFF3CT

International audienceThis demonstration intends to present AFF3CT (A Fast Forward 3rror Correction Tool). The main objective of AFF3CT is to provide a portable, open source, fast and flexible software to the channel coding community in such a way that researchers can spend more time on channel coding / algorithmic problems instead of software development issues. It is also intended to facilitate the process of hardware verification and debug with the objective of fast prototyping. I. SIMULATION OF A DIGITAL COMMUNICATION CHAIN Despite the wide variety of existing communication systems , all of them are based on a common abstract model that was proposed by the genius founder of information theory, Claude Shannon [1]. Figure 1 shows the synoptic of such a communication chain. In this structure, the channel encoder and decoder determine the achievable error rate of the system. Moreover, the channel decoder is a large contributor in the overall computational complexity of the system. On the eve of the 5th generation of mobile communication systems, one of the challenges is to imagine systems able to transmit a huge amount of data in a very short amount of time at a very small energy cost in a wide variety of environments. In such a context, researchers work at refining some existing coding schemes (encoder + decoder) in such a way that the system has a low residual error rate and that the associated decoder is fast, flexible and has a low complexity. The validation of a new coding scheme requires the estimation of the error rate performance. Unfortunately, most of the time, no simple mathematical model exists to predict the performance of a channel encoder/decoder. The only simple solution is to perform a Monte Carlo simulation of the whole communication chain: some data are pseudo-randomly generated, encoded, modulated, noised, decoded and the performance is estimated by measuring the Bit Error Rate (BER) and the Frame Error Rate (FER) at the receiver side. This apparently simple setup leads to three main problems. Reproducibility: It is usually a tedious task to reproduce the results from the literature. This can be explained by the large amount of empirical parameters necessary to define one communication system and not all of them are reported in the publications. Moreover, it is rare that researchers actually share the source code of their simulator. As a consequence, a large amount of time is spent "reinventing the wheel" only to be able to compare to the state-of-the-art results